I'm

Sarthak Gupta

ASIC Engineer in NVIDIA, ex. Design Engineer in Texas Instruments
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Brief About Me

Summary

Skills

Hardware Descriptive Languages: Verilog, System Verilog, VHDL

90%

Simulation Languages: Python, MATLAB

85%

Embedded Design Languages: C, C++, Embedded C, Wiring

90%

Misc. Languages: Latex, HTML, CSS

75%

Hardware Design/Simulation Tools: Xilinx Vivado, Eclipse (with ARM plugin), Eagle, Altium

85%

IC Design/Simulation Tools: Synopsys Verdi, Cadence SimVision, Cadence Virtuoso

85%

Relevant Coursework

  • Hardware - Digital VLSI Circuits, Digital Systems Design with FPGAs, Embedded System Design, Analog VLSI Circuits, Design of Analog Circuits, Basics of Semiconductor Devices and technology, Computer Systems Organization
  • Machine Learning and Neuroscience - Pattern Recognition and Neural Networks, Practical Data Science, Fundamentals of Systems and Cognitive Neuroscience
  • Signal Processing – Filter Design, Basics of Signal Processing, Digital Signal Processing

My Resume

Professional/Academic Journey

August, 2019 - Till Date (2+ Years)

ASIC Engineer

Nvidia, Bengaluru, India

  • Working on unit level design verification of next generation PCIe.
  • Responsible for verification of certain features such as Equalization, Speed Change, Alternate Protocol Negotiation and CXL Protocol of logical part (Physical Layer) in PCIe.
August, 2017 - June,2019

Master of Technology in Electronic Systems Engineering

Indian Institute of Science, Bengaluru

  • CGPA: 9.0(out of 10)
  • Awarded Pratiksha trust travel grant for poster presentation in IEEE ISCAS, Sapporo, Japan, 2019.
  • Received scholarship from Ministry of Human Resource Development (MHRD) for pursuing Masters Programme at Indian Institute of Science
July,2014 - Jan,2016 (1.5 Years)

Design Engineer

Texas Instruments, Bengaluru, India

  • Contributed to RTL Design, verification and silicon validation of ARM Cortex M0 plus based system.
  • Performed unit level design verification for memory controllers and memory testchips.
August, 2013 - May, 2014

Project Trainee

TI- Centre for Embedded Product Design, Netaji Subhas Institute of Technology, Delhi, India

  • Worked on embedded system design using Tiva C series microcontrollers.
  • Developed various daughter boards (learning kits) for interfacing Tiva LaunchPads with FPGA, along with various sensors and IO devices.
  • Instructor for "Texas Instruments Winter Internship Program for Embedded System Design". Trained over 300 students from engineering background in end to end embedded product design.
August, 2010 - June,2014

Bachelor of Engineering in Electronics and Communication Engineering

Netaji Subhas Institute of Technology, Delhi, India

  • CGPA: 8.2(out of 10)
  • Received merit scholarship for 3 years out of the 4 years during Bachelor of Engineering.

Research

Publications

Journal Publication(s)

Conference Publication(s)

Book(s)

Invited Talks

Research/Academic Work

Research and Academic Projects

  • All
  • Masters Projects
  • Bachelors Projects
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Neuromorphic recurrent neural network for temporal data recognition tasks

It was a master thesis project. Proposed and implemented the hardware design of reservoir network which can perform real-time classification on temporal data. The designed is implemented using lower hardware resources such as logic elements, multipliers and memory with better latency compared to existing hardware design of recurrent neural networks. Proposed model is validated for speech recognition and human activity classification.

Pattern Classification using Bayesian Analysis

Performed Bayesian Analysis for classification on MNIST and CIFAR-10 dataset. Used maximum likelihood estimation to determine the parameters of conditional density. Created a real-time demo to recognize user drawn handwritten digit.

Audio Assistant - Voice controlled system

Based on user voice commands, functioning of embedded system will be controlled. Through speech, user can control status of red, green, and blue LEDs on Tiva LaunchPad and can ask for temperature. In response system can greet the user, tell the temperature and reply whether it has received the command to control LED Lights.

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Efficient On-chip Learning Mechanism - for Neural Networks

Developed a learning mechanism for implementation of neural networks in FPGA or digital hardware. The proposed technique uses local learning and sign based approach to update weights. This add parallelism with reduced hardware while learning. Tested the mechanism using MNIST and CIFAR-10 database with RELU as activation function.

Hardware Software Co-design - Image Processing Implementation

It was a bachelor thesis project. Developed a motherboard having FPGA of Spartan-3E family, with a 12-bit interface for Tiva LaunchPad (Evaluation Board by Texas Instrument). Image processing tasks such as edge detection and contrast enhancement were performed using hardware software co-design techniques.

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LOLduino - Labour of Love Duino

Designed a system using Atmega 324 having arduino generic footprint in addition to various features like temperature sensors, light sensors, electret microphone (MIC), potentiometer, DAC7571, real time clock (RTC), micro SD-Card, RS232/RS485, LCD and keypad. Here, arduino IDE was tweaked so that same can be able to program above Atmega324 based system. And, all current existing libraries for Arduino UNO are compatible with this system.

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Emergency ICU Monitor - Cheap and Portable Health Diagnostic Unit

Designed a diagnostic unit using ARM Cortex-M3 based microcontroller which includes user electrocardiograph and pulse-oximeter with its user interface on television unit and TFT LCD.